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One stop shop for embedded systems development and testing tools

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IAR Embedded workbench for ARM, Cortex-Mx/Rx/Ax, MSP430 and more

IAR Embedded Workbench 

IAR compiler makes your code small  fast and efficient. A powerful code analysis ensures its quality. The compiler and the debugger of IAR Embedded Workbench is considered to be best in class.

Unlock Performance with Smart Decisions

Free tools can offer a quick start, but they often cost you in performance and development time. With IAR, you gain superior code optimization, faster execution, and lower overall costs for your embedded system projects.

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Cantata – Automated Unit and integration test framework for C/C++

Automated Unit and Integration Testing Tool for C/C++

Cantata is an automated unit and integration testing tool for C and C++ languages, enabling developers to verify standard compliant or business critical code on host native and embedded target platforms.

Cantata helps accelerate compliance with the standard’s dynamic testing requirements by automating:

  • C and C++ unit testing framework generation
  • Test execution
  • Results diagnostics and report generation

Cantata is integrated with an extensive set of embedded development toolchains, from compilers and static analysis tools to build and requirements management tools. The ECLIPSE® GUI, tight tool integrations and tests written in the source C/C++ code, all make Cantata easy to use.

 

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Segger J-Link family ARM debug probes and Memory Programmers

J-Link debug probes

SEGGER J-Links are the most widely used line of debug probes on the market. They have provided solid value to embedded development for over a decade. Unparalleled performance, an extensive feature set, many supported CPUs and compatibility with popular environments all make J-Link an unbeatable choice.

J-Link debug probes are the most popular choice for optimizing the debugging and flash programming experience. Benefit from record-breaking flash loaders, up to 4 MB/s RAM download speed and the ability to set an unlimited number of breakpoints in the flash memory of MCUs.J-Link also supports a wide range of CPUs and architectures. Everything from single 8051 to mass market Cortex-M to high-end cores like Cortex-A (32- & 64-bit).J-Link supports directly interfacing SPI flashes, without the need of a CPU between J-Link and the SPI flash (directly communicating via the SPI protocol). J-Link is further supported by all major IDEs, including SEGGER Embedded Studio or Visual Studio Code.
Related documentation:

J-link SWO in Segger wiki

J-link- list of utilities

J-link commander

J-link RTT

Different HW trace types

Debug and trace connectors

Jlink-plus compact

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PikeOS -Hypervisor and RTOS in the same product. Aerospace and Defense, Automotive for Safety and Security systems and Multi-Core certification

PikeOS – Hypervisor and RTOS in the same product

PikeOS technology combines hypervisor and real-time in the same product.  it offers a separation kernel-based hypervisor with multiple partitions for different API’s and Operating systems including    Linux, ARINC653, Posix, PikeOS native (real time),
It enables you to build devices for environments with strong demands for Safety and Security requirements.

The technology behind PikeOS enable it to work in products that demands the highest *Safety* level :  for example,  DO-178C for Avioncs systems in the highest Level – DAL A certification.  the technology is ready for multicore certification at the highest level.

Not only that, PikeOS technology is strong achiving high *security* standard. and as for now it has EAL 5+ security standard certified because it has strict separation and communication  smart comunication between internal partitions that keep the communication very safe and secure.

Sysgo is one of the first companies in the world to achive  *Multi-Core certification* at the highest level, embedded virtualization technology. its has running projects in the Aerospace & Defense as well as Automotive and Transportation vertical markets.

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What is JTAG testing?

What is JTAG testing – a Corelis Tutorial

Since its introduction as an industry standard in 1990, boundary-scan (also known as JTAG) has enjoyed growing popularity for board

level manufacturing test applications. JTAG has rapidly become the technology of choice for building reliable high technology electronic

products with a high degree of testability. Due to the low-cost and IC level access capabilities of JTAG, its use has expanded beyond

traditional board test applications into product design and service.

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Our partners

IAR Systems is a Swedish computer software company that offers development tools for embedded systems. IAR Systems was founded in 1983, and is listed on Nasdaq Nordic in Stockholm

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Our customers