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emBOS-Ultra-safe- precertified RTOS for Safety systems
October 20, 2026

emBOS-Ultra-safe- precertified RTOS for Safety systems

Modern embedded systems must execute complex real-time tasks efficiently. At the same time, developers must meet strict stability, security, and safety standards. Consequently, choosing the right Real-Time Operating System (RTOS) is one of the most critical decisions in any development lifecycle.

This guide explores SEGGER’s RTOS solutions step by step. First, we examine core real-time operating system concepts. Next, we cover the advanced scheduling power of embOS-Ultra. Finally, we review the pre-certified embOS-Ultra-Safe variant.


1. Introduction: SEGGER & Real-Time Operating Systems (RTOS)

SEGGER Microcontroller is a global leader in software and hardware development tools for embedded systems. At the core of its software portfolio lies embOS. This deterministic, highly efficient RTOS delivers ultra-fast execution for embedded microcontrollers.

  • Universal Microcontroller Fit: In general, embOS is engineered to fit exceptionally well across all microcontroller types. Specifically, it offers deep optimization for the ARM Cortex-M family (Cortex-M0/M0+/M3/M4/M7/M23/M33/M55/M85).
  • Primary Purpose: The operating system delivers a reliable foundation for multi-tasking. Therefore, applications achieve minimal resource overhead and optimal response times.
  • Conservative Resource Footprint & Latency Estimates:
    • ROM Footprint: A bare-bones classic kernel requires minimal flash (~1–3 KB). However, a production-ready safety variant (embOS-Ultra-Safe with MPU features enabled) realistically consumes roughly 4 KB to 8 KB+ of ROM.
    • RAM Footprint: Memory consumption remains minimal. Generally, the kernel requires only a few bytes for data structures plus individual task stacks (typically 256–512 bytes per stack).
    • Zero Interrupt Latency: Crucially, embOS introduces zero RTOS-induced latency for high-priority interrupts. Thus, the system services critical hardware events immediately without kernel interference.
    • ST Microcontroller Latency Examples:
      • ST STM32 Cortex-M4 (e.g., STM32F4 / STM32G4): Hardware interrupt entry takes just 12 CPU cycles (~0.07 µs at 168 MHz). As a result, high-priority ISRs execute at native hardware speed.
      • ST STM32 Cortex-M7 (e.g., STM32H7): Similarly, hardware interrupt entry takes approximately 12 to 14 CPU cycles (~0.025 µs at 480 MHz).

Understanding Zero Interrupt Latency:
Traditional RTOS kernels frequently disable all interrupts during internal updates. Unfortunately, this creates unpredictable delays (jitter) for time-critical events. Conversely, embOS solves this problem by using hardware priority splitting. High-priority interrupts (such as motor control loops or safety shutdowns) operate above the kernel threshold. Because embOS never masks or disables these interrupts, they execute at raw hardware speed (~12 cycles on STM32 Cortex-M). Meanwhile, lower-priority tasks handle routine API calls without stalling critical control loops.

  • Core Features: Overall, embOS provides an extremely small memory footprint alongside broad support for leading architectures (ARM Cortex-M/A/R, RISC-V).

2. Technological Evolution: embOS-Ultra, Single-Shot Timers & Power Efficiency

Building on classic embOS, embOS-Ultra introduces advanced scheduling capabilities. These features are specifically designed for modern real-time requirements.

  • Single-Shot Hardware Timer: Instead of relying on a traditional periodic tick, embOS-Ultra uses a single-shot hardware timer. Consequently, the system generates interrupts exactly when necessary.
  • Shift to Time-Based RTOS & Power Efficiency: Shifting to an event-driven RTOS eliminates millions of unnecessary periodic CPU wakeups. As a result, microcontrollers remain in low-power sleep modes much longer. This change drastically boosts power efficiency and extends battery life in portable devices.
  • Cycle-Resolution Scheduling & Precision: By operating at CPU cycle-resolution rather than fixed periodic ticks, the kernel achieves microsecond-level precision for event timing.
  • Seamless Migration: In addition, embOS-Ultra maintains full API compatibility with standard embOS variants for smooth upgrades.

3. Safety-Critical Applications: embOS-Ultra-Safe & Saving Months of Work

For high-reliability, safety-critical applications, SEGGER offers embOS-Ultra-Safe. This pre-certified RTOS variant streamlines regulatory compliance for medical, automotive, and industrial devices.

  • What is Included & How It Saves Months of Work:
    • Pre-Certified RTOS Foundation: Out of the box, the kernel is pre-certified for IEC 61508 SIL 3 (Industrial), IEC 62304 Class C (Medical), and ISO 26262 ASIL D (Automotive). Furthermore, additional standards (Aviation, Rail, Space) are available on request.
    • Save Months of Development Time: SEGGER provides all required documentation, safety manuals, test suites, and software lifecycle reports. Because testing and certification are fully handled, engineering teams do not need to qualify the OS from scratch. Ultimately, this turnkey package saves end customers months of rigorous verification work.
    • Built-In MPU Feature: Importantly, embOS-Ultra-Safe includes the MPU feature inside its certified safety concept. The OS leverages hardware Memory Protection Units for built-in task isolation. Therefore, it prevents runaway tasks from corrupting adjacent memory areas.
    • FDA Regulatory Ready Documentation: SEGGER includes official TÜV certificates and validation artifacts. These documents accelerate medical device approval processes with regulatory bodies such as the FDA.
    • In-House Safety Expertise: Dedicated Functional Safety (FUSA) experts manage certification maintenance at SEGGER. Thus, developers receive timely updates for new processor cores and compilers.
    • Custom Board Support Package (BSP): Each license includes a custom BSP tailored directly to your target hardware.
    • Royalty-Free Licensing: Commercial licenses rely on a one-time payment model without runtime royalties. Consequently, project costs remain fully predictable over the product lifecycle.
  • API Compatibility: Finally, full API compatibility ensures straightforward project migration from standard embOS builds.

4. Summary & Regulatory Readiness

Furthermore, connected embedded devices must comply with evolving cybersecurity mandates. Utilizing a commercial RTOS backed by official vendor vulnerability management and reporting tools significantly helps developers satisfy European Cyber Resilience Act (CRA) requirements.


Local Engineering Support & Guidance in Israel – Sightsys

Sightsys is the official representative and distributor of SEGGER in Israel. Our expert engineering team accompanies local development teams from architecture evaluation and BSP integration to IDE debugging setup (such as IAR Embedded Workbench) and medical regulatory compliance.


Presentation Slides

Slide 1: Introduction to SEGGER embOS Infrastructure

  • Universal Architecture: Optimized for all microcontrollers, featuring deep optimization for ARM Cortex-M cores.
  • Realistic Footprint & Zero Latency: Conservative safety-variant ROM footprint (~4–8 KB), featuring Zero Interrupt Latency via hardware priority splitting (~12 cycles on ST STM32 Cortex-M4/M7).
  • Pre-Certified Safety Package: The Safe version includes complete Safety Manuals and official certificates. These documents prove the RTOS is certified according to all relevant standards (IEC 61508 SIL 3, IEC 62304 Class C, ISO 26262 ASIL D).
  • Core Capabilities: Broad MCU support (ARM Cortex-M/A/R, RISC-V) with optimal resource efficiency.

Slide 2: embOS-Ultra: Single-Shot Timers & Power Efficiency

  • Event-Driven Hardware Timer: Replaces the traditional 1ms system tick with a single-shot hardware timer that interrupts only when necessary.
  • Superior Power Efficiency: Replacing periodic clock ticks with a time-based scheduler allows the CPU to stay in deep sleep modes longer. As a result, energy efficiency improves significantly.
  • Precision & Compatibility: Achieves CPU cycle-resolution precision while preserving full API compatibility with existing embOS projects.

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